A team of researchers at MIT have combined several existing techniques to make the patterns of wires and components in microchips smaller than ever before.
The new process uses a novel integration of three existing methods. First, a pattern of lines is produced on the chip surface using well-established lithographic techniques, in which an electron beam is used to "write" the pattern on the chip. Then, a layer of material known as a block copolymer — a mix of two different polymer materials that naturally segregate themselves into alternating layers or other predictable patterns — is formed by spin coating a solution. The block copolymers are made up of chain-like molecules, each consisting of two different polymer materials connected end-to-end. Finally, a top, protective polymer layer is deposited on top of the others using initiated chemical vapor deposition (iCVD). This top coat, it turns out, is a key to the process: It constrains the way the block copolymers self-assemble, forcing them to form into vertical layers rather than horizontal ones, like a layer cake on its side.