WD Announces Four-Bits-Per-Cell (X4) Technology on 3D NAND

Western Digital Corp. today announced its successful development of four bits per cell, X4, flash memory architecture offering on 64-layer 3D NAND, BiCS3, technology. Building on its pioneering innovation of X4 for 2D NAND technology and past success in commercializing it, the company has now developed X4 for 3D NAND by leveraging its deep vertical integration capabilities. These include silicon wafer processing, device engineering to provide sixteen distinct data levels in every storage node, and system expertise for overall flash management. BiCS3 X4 technology delivers an industry-leading storage capacity of 768 gigabits on a single chip, a 50 percent increase from the prior 512 gigabit chip that was enabled with the three bits per cell (X3) architecture. Western Digital will showcase removable products and solid-state drives built with BiCS3 X4 and systems capabilities in August at the Flash Memory Summit in Santa Clara, California.