As new digital economies continue to rise across industries from biomedicine research to autonomous driving, generating a plethora of data, there is a great demand for high-performance computing (HPC) to advance systems for scalability and agility to support optimal data use in compute, storage, memory, network and security. At the 2017 International Supercomputing Conference (ISC 17), Intel demonstrated that to manage these diverse workloads efficiently, HPC systems will need to evolve to enable new levels of performance, scalability, memory bandwidth and I/O capabilities. Intel discussed how new approaches to HPC system design and flexible delivery models are enabling users to get more value from HPC than ever before.
At ISC 17, Intel disclosed its latest developments to further advance HPC systems and transform new experiences for supercomputing users. Intel explained how its upcoming Intel® Xeon® Processor Scalable family, with its significant per-core performance enhancements and other advancements, supports a wide range of workloads. Through its integration of the Intel® Advanced Vector Extensions 512 (Intel® AVX-512), the platform generates 2X FLOPs/clock-cycle peak improvements, offering a boost to performance for demanding use.1 Intel AVX-512 combined with improvements in cores, cache and memory, delivers up to 2.27X more performance than today’s Intel Xeon processor E5 v4 (formerly codenamed Broadwell), and up to 8.2X more double precision GFLOPS/second when compared to a four-year old Intel Xeon processor E5 family in the installed base.2 In addition, the Intel® Omni-Path Architecture (Intel® OPA), a high-bandwidth and low-latency fabric for performance optimization, is integrated with the Intel Xeon Processor Scalable family to deliver the performance for today’s HPC workloads and ability to scale to tens of thousands of nodes while benefiting from improved total cost of ownership.
