Monday, June 5, 2017

IBM: 5nm Transistors Inching Their Way Into Chips

Announced at the 2017 Symposia on VLSI Technology and Circuits conference in Kyoto this week, IBM and our research alliance partners, GLOBALFOUNDRIES and Samsung built a new type of transistor for chips at the 5 nanometer (nm) node. To achieve this feat, the architecture – how the elements of a chip are arranged and the materials used – had to change.

We stacked layers of silicon nanosheets together, horizontally, in order for this new architecture to enable our 5nm transistor to deliver the power and performance boost future applications will demand. The change from today’s vertical architecture to horizontal layers of silicon opened a fourth “gate” on the transistor that enabled electrical signals to pass through and between other transistors on a chip. At these dimensions, it means that those signals are passing through a switch that’s no larger than the width of two to three DNA strands, side-by-side.